Can GPT-6 Astra
design a PCB?
OpenAI's launch demo showed GPT-6 Astra operating KiCad directly. It has since gone to the top of the one public benchmark that measures whether AI-designed circuits actually work, at 69.3%, which is first place and also three tasks in ten wrong. We ran it across 40 of our own boards to see what that looks like behind a verification gate.
What the demo actually showed
In its GPT-6 Astra launch, OpenAI showed the model driving KiCad through its own interface: starting from a finished schematic, placing components on the board, and routing copper between them. The run took roughly three minutes and was shown compressed to about fifteen seconds, which is the clip most people saw. OpenAI’s own recording of that segment is here, and it is worth watching before reading anyone’s summary of it, including this one.
Operating professional design software through its UI is the part that is genuinely new. But the task it was operating on, turning a finished schematic into a routed board, is the stage of PCB design that dedicated tools already automate. Whether the schematic was correct, and whether the board could be manufactured, were not what the demo measured.
What the benchmarks say
EEBench, from the atopile team, is the clearest public attempt to measure this. It has models submit designs as code, then builds each one, extracts the circuit graph and bill of materials, and runs SPICE and design checks against real manufacturer specifications across tolerance corners.
EEBench leaderboard, top five, updated 4 September 2026
| # | Model | Score (%) | Cost / task | Time / task |
|---|---|---|---|---|
| 1 | GPT-6 Astra | 69.3 ±10.7 | $0.83 | 1m46s |
| 2 | Claude Opus 5 | 61.6 ±6.0 | $2.38 | 13m1s |
| 3 | Grok 4.6 | 57.1 ±9.9 | $2.11 | 35m26s |
| 4 | Claude Fable 5.1 | 56.4 ±10.1 | $2.92 | 10m52s |
| 5 | Gemini 3.8 Flash | 55.4 ±10.4 | $1.38 | 9m47s |
Source: the EEBench leaderboard, by the atopile team. Their write-up of the methodology is here. Scores move; check the board before quoting these.
Two things are worth reading past the order. Astra’s margin is plus or minus 10.7 points, wide enough to overlap Claude Opus 5 below it, so the top of this board is less settled than a ranked list makes it look. What is not ambiguous is the efficiency: Astra is roughly a third of the cost and a seventh of the time per task.
And the ceiling matters more than the ranking. The best model available gets about seven real circuit tasks in ten right, which means it gets three wrong. That is the number that should decide how much verification you put around a model, whichever one you use, and it is why a routing demo is not the same as a working board.
What GPT-6 did behind our verification gate
We ran GPT-6 across 40 boards spanning drones, robotics and sensors, inside the same harness every Cherry Blossom board goes through: real part data for footprints, and a verification gate on every AI edit.
First-pass fab yield
94% → 97%
Boards that came back from the fab working on the first run, with no respin.
Design time
−54%
Against Sakura 2 High, the model it was swapped in for, on the same boards.
Put those next to the benchmark and the gap is the whole argument. The same model scores 69.3% designing circuits on its own and produces boards that come back working 97% of the time once real part data and a verification gate are wrapped around it. Nearly a third of what the raw model gets wrong is caught before a board is ordered, which is what the harness is for.
Two honest caveats. Forty boards is our own sample, not an independent benchmark, and we are reporting it rather than a third party verifying it. And this is why GPT-6 is not on the roster yet: a result this good is a reason to keep testing it, not a reason to ship it before we know where it fails.
Four things a board has to clear
These hold for any model. Routing, the thing the demo showed, is one of four, and it is the one that was already closest to solved.
Is the circuit actually right?
Netlist correctness
A language model is good at producing a plausible circuit, and plausible is not the bar. EEBench's hold-up capacitor task is the clearest published example: a design specified 22 µF nominally, but at 4.7 V bias the grader measured only 11.4 µF of effective capacitance against a 545 µF requirement. The part number was real and the schematic looked correct. The rail still collapsed.
Does the part exist, and is the land pattern right?
Real parts, real footprints
A schematic symbol is not a component. The board needs a real part whose pad geometry matches the package a fab house will actually solder. Invented footprints are the most expensive failure in this list, because nothing catches them until assembly, by which point the boards are paid for.
Can it be laid out without violating the rules?
Placement and routing
This is the part the Astra demo showed, and the part that was already most tractable. Placement and routing are spatial problems with hard constraints: trace width, clearance, layer count, courtyard overlap. Dedicated autorouters like Quilter and DeepPCB have worked on exactly this for years, which is worth remembering before reading a routing demo as a general capability jump.
Will a fab house accept it?
Manufacturability
A design that passes every internal check can still be rejected for a minimum drill size, an annular ring, or a clearance the process cannot hold. Checking against a named fab's rules before anyone pays is the difference between a design and an order.
The part that isn't the model
If the best available model is wrong four times in ten, the interesting engineering is not which model you pick. It is what catches the four.
A verification gate on every AI edit. Each change is checked against manufacturing rules before you can order, so a design a board house would reject is caught while it is still free to fix.
Real land patterns, not invented ones. Cherry Blossom pulls every footprint from real part data rather than letting a model guess what a package looks like, which is the failure mode that survives all the way to assembly.
A roster that changes on evidence, not launches. Sakura 2 High, on Ultra, is backed by Sakura 2 High, second on that board. Astra is first, and we are testing it against real boards rather than adding it on the strength of a leaderboard row. If Astra is what you want behind your boards, say so in Discord and it moves up the queue.
And the honest limit: none of this makes a board correct by itself. It makes the wrong ones cheap to find. A design still wants an engineer’s eye before it is ordered.
If you want to see where a model gets it right and where the gate stops it, the fastest way is to describe a board and watch what comes back. It runs in the browser, with the AI included.
Questions
Partly, and it is now the best-measured model at it. OpenAI's launch demo showed GPT-6 Astra operating KiCad from an existing schematic, placing components and routing copper in about three minutes. On EEBench, an independent benchmark from the atopile team that builds each submitted design and runs SPICE against real manufacturer specifications, Astra ranks first at 69.3% as of 4 September 2026, ahead of Claude Opus 5 at 61.6%. It is also far cheaper and faster per task, at $0.83 and one minute 46 seconds against $2.38 and thirteen minutes. Read the ceiling rather than the ranking, though: 69.3% means the best model available still gets roughly three real circuit tasks in ten wrong, and its margin of error is wide enough to overlap the model below it. It can design a PCB. It cannot yet be trusted to without checking.
It showed the model operating KiCad's interface directly rather than emitting a netlist for a human to import: starting from an existing schematic, placing components on the board, and routing copper between them. The published run took roughly three minutes and was shown compressed to about fifteen seconds. Two things are worth separating. Driving professional design software through its own UI is a genuine capability step, and it is what made the clip travel. But the task in the demo, converting a finished schematic into a routed board, is the stage of PCB design that dedicated tools already automate. The harder questions, whether the schematic was right in the first place and whether the board is manufacturable, were not what the demo was measuring.
The best public measurement is EEBench, built by the atopile team. It has models submit designs in declarative code, then builds each one, extracts the circuit graph and bill of materials, and runs SPICE simulations and design checks against real manufacturer specifications across tolerance corners. As of 4 September 2026, GPT-6 Astra leads at 69.3%, ahead of Claude Opus 5 at 61.6%, Grok 4.6 at 57.1% and Claude Fable 5.1 at 56.4%. Two things are worth reading past the ranking. The error margins are wide, and Astra's at plus or minus 10.7 points overlaps the model below it, so the ordering at the top is less settled than a leaderboard makes it look. And the ceiling matters more than the order: the best model available still gets about three real circuit tasks in ten wrong.
Not yet, though we have tested it. Cherry Blossom's managed models are Sakura 2 Base on every plan and Sakura 2 High on Ultra, and those names are ours rather than the vendor's, because the roster is a tier ladder and which upstream model backs a tier can change without the tier being renamed for users. We ran GPT-6 across 40 boards inside our own harness, spanning drones, robotics and sensors: first-pass fab yield went from 94% to 97%, and design time fell 54% against Sakura 2 High. That is a strong result on our own sample, and it is a reason to keep testing rather than to ship on a launch week, because we would rather know where a model fails before it is designing your board. If Astra is what you want behind your boards, say so in Discord and it moves up the queue.
Yes, and this is the part that works best today. Turning an existing schematic into a routed board is a well-defined constrained optimisation problem, which is why Quilter and DeepPCB specialise in it and why the Astra demo chose it. Cherry Blossom covers the whole path, from a plain-English prompt through schematic and layout to Gerbers, and runs a verification gate against manufacturing rules before you can order. The gate matters more than the model: a design that passes internal checks can still be rejected by a fab house, and catching that while it is still free to fix is the difference between a design and a board that arrives working.
Cherry Blossom exports fab-ready Gerbers, an editable KiCad project, a CSV bill of materials, and the underlying Circuit JSON. Those are the same files you would send to JLCPCB, PCBWay, or OSH Park. Circuit JSON is an open, inspectable format, so a board stays readable without the tool that made it.
Try it on a board of your own.
Describe a circuit in plain English and see the schematic, the layout, and what the verification gate says. In the browser, exports to Gerbers and KiCad.
